• English
    • Ελληνικά
    • Deutsch
    • français
    • italiano
    • español
  • Deutsch 
    • English
    • Ελληνικά
    • Deutsch
    • français
    • italiano
    • español
  • Einloggen
Dokumentanzeige 
  •   DSpace Startseite
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ.
  • Dokumentanzeige
  •   DSpace Startseite
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ.
  • Dokumentanzeige
JavaScript is disabled for your browser. Some features of this site may not work without it.
Gesamter Bestand
  • Bereiche & Sammlungen
  • Erscheinungsdatum
  • Autoren
  • Titeln
  • Schlagworten

Implementation and performance analysis of SEAL encryption on FPGA, GPU and multi-core processors

Thumbnail
Autor
Theoharoulis, K.; Antoniadis, C.; Bellas, N.; Antonopoulos, C. D.
Datum
2011
DOI
10.1109/FCCM.2011.33
Schlagwort
CMP
Cryptography
Encryption
FPGA
GPU
Reconfigurable Computing
Competitive advantage
Customizable
Encryption algorithms
Graphics processing units
Graphics processor units
High memory bandwidth
Multi-core processor
Parallel executions
Performance analysis
Performance study
Plaintext
Special purpose processors
Speed-ups
Competition
Computer architecture
Computer graphics equipment
Computers
Microprocessor chips
Multiprocessing systems
Program processors
Field programmable gate arrays (FPGA)
Zur Langanzeige
Zusammenfassung
Accelerators, such as field programmable gate arrays (FPGAs) and graphics processing units (GPUs), are special purpose processors designed to speed up compute-intensive sections of applications. FPGAs are highly customizable, while GPUs provide massive parallel execution resources and high memory bandwidth. In this paper, we compare the performance of these architectures, presenting a performance study of SEAL, a fast, software-oriented encryption algorithm on a Virtex-6 FPGA, a Graphics Processor Unit (GPU), and Intel Core i7, a 2-way hyper-threaded, 4-core processor. We show that each platform has relative competitive advantages in encrypting an input plaintext using SEAL. © 2011 IEEE.
URI
http://hdl.handle.net/11615/33648
Collections
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ. [19735]

Verwandte Dokumente

Anzeige der Dokumente mit ähnlichem Titel, Autor, Urheber und Thema.

  • Thumbnail

    Supporting multitasking of pipelined computations on embedded parallel processor arrays 

    Syrivelis, D.; Lalis, S. (2009)
    This paper presents software support that enables seamless task restructuring and load balancing of pipelined applications at runtime, making it possible to dynamically pick the stages that will be executed as separate ...
  • Thumbnail

    Extracting coarse-grained pipelined parallelism out of sequential applications for parallel processor arrays 

    Syrivelis, D.; Lalis, S. (2009)
    We present development and runtime support for building application specific data processing pipelines out of sequential code, and for executing them on a general purpose platform that features a reconfigurable Parallel ...
  • Thumbnail

    Implementation of the AVS Video Decoder on a Heterogeneous Dual-Core SIMD Processor 

    Koziri, M.; Zacharis, D.; Katsavounidis, I.; Bellas, N. (2011)
    Multi-core Application Specific Instruction Processors (ASIPs) are increasingly used in multimedia applications due to their high performance and programmability. Nonetheless, their efficient use requires extensive ...
htmlmap 

 

Stöbern

Gesamter BestandBereiche & SammlungenErscheinungsdatumAutorenTitelnSchlagwortenDiese SammlungErscheinungsdatumAutorenTitelnSchlagworten

Mein Benutzerkonto

EinloggenRegistrieren
Help Contact
DepositionAboutHelpKontakt
Choose LanguageGesamter Bestand
EnglishΕλληνικά
htmlmap