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  •   Ιδρυματικό Αποθετήριο Πανεπιστημίου Θεσσαλίας
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
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  • Προβολή τεκμηρίου
  •   Ιδρυματικό Αποθετήριο Πανεπιστημίου Θεσσαλίας
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ.
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Ιδρυματικό Αποθετήριο Πανεπιστημίου Θεσσαλίας
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Extracting coarse-grained pipelined parallelism out of sequential applications for parallel processor arrays

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Συγγραφέας
Syrivelis, D.; Lalis, S.
Ημερομηνία
2009
DOI
10.1007/978-3-642-00454-4_4
Λέξη-κλειδί
Annotated programs
Application specifics
Coarse-grained
Code restructuring
Code segments
Data flows
Data processing pipelines
Embedded FPGA
Executable codes
Executables
General purpose
Operating systems
Parallel processors
Pipeline structures
Pipelined parallelisms
Pre processors
Prototype systems
Re-configurable
Runtime supports
Sequential applications
Soft processors
Applications
Data processing
Embedded systems
Pipeline codes
Pipelines
Program processors
Pipeline processing systems
Εμφάνιση Μεταδεδομένων
Επιτομή
We present development and runtime support for building application specific data processing pipelines out of sequential code, and for executing them on a general purpose platform that features a reconfigurable Parallel Processor Array (PPA). Our approach is to let the programmer annotate the source of the application to indicate the desired pipeline stages and associated data flow, with little code restructuring. A pre-processor is then used to transform the annotated program into different code segments according to the indicated pipeline structure, generate the corresponding executable code, and produce a bundled application package containing all executables and deployment information for the target platform. There are special mechanisms for setting up the application-specific pipeline structure on the PPA and achieving integrated execution in the context of a general-purpose operating system, enabling the pipelined application to access the usual system peripherals and run concurrently with other conventional programs. To verify our approach, we have built a prototype system using soft processor arrays on an embedded FPGA platform, and transformed a well-known application into a pipelined version that executes successfully on our prototype. © 2009 Springer Berlin Heidelberg.
URI
http://hdl.handle.net/11615/33503
Collections
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ. [19735]

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