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  •   Ιδρυματικό Αποθετήριο Πανεπιστημίου Θεσσαλίας
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  •   Ιδρυματικό Αποθετήριο Πανεπιστημίου Θεσσαλίας
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ.
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Ιδρυματικό Αποθετήριο Πανεπιστημίου Θεσσαλίας
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Large scale circuit simulation exploiting combinatorial multigrid on massively parallel architectures

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Συγγραφέας
Garyfallou D., Evmorfopoulos N., Stamoulis G.
Ημερομηνία
2018
Γλώσσα
en
DOI
10.1109/MOCAST.2018.8376654
Λέξη-κλειδί
Combinatorial circuits
Conjugate gradient method
Electric power transmission networks
Parallel architectures
Program processors
Timing circuits
Transient analysis
Diagonally dominant
Efficient implementation
Large-scale circuits
Modified nodal analysis
Number of iterations
Preconditioned conjugate gradient method
Preconditioning method
Very large scale integrated circuit
Circuit simulation
Institute of Electrical and Electronics Engineers Inc.
Εμφάνιση Μεταδεδομένων
Επιτομή
The complexity of modern very large scale integrated circuits renders circuit simulation very essential in the design process, as it is the only feasible way to verify circuit's behaviour prior to manufacturing. The heart of circuit simulation relies on the solution of huge systems resulting after the modelling using Modified Nodal Analysis. Matrices arising in those systems are sparse Symmetric Diagonally Dominant (SDD) matrices, and as a result, iterative methods for efficiently manipulating them are very crucial to the performance of the simulation. In recent years, the emphasis has been placed on preconditioning methods which reduce the number of iterations for solving such systems, while significant advancements have been accomplished in efficient implementations on massively parallel architectures like GPUs. This paper presents a GPU-accelerated simulator, based on the Preconditioned Conjugate Gradient method, which exploits the Combinatorial Multigrid, a reliably efficient SDD solver based on support theory principles, for fast DC and transient analysis of large-scale circuits. Experimental results on IBM power grids, demonstrate speedups up to 4.56x and 5.10x for the PCG method and the CMG preconditioning algorithm, respectively, compared to the optimized CPU implementations. © 2018 IEEE.
URI
http://hdl.handle.net/11615/71980
Collections
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ. [19735]

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