On the Sparsification of the Reluctance Matrix in RLCk Circuit Transient Analysis

Abstract

The ever increasing frequency scaling of contemporary very large scale integrated circuits has introduced the necessity to factor in signal integrity the analysis of inductive effects arising within the different blocks of an IC. The efficient simulation of the inductive effects requires sparsification of the dense inductance matrix, or its inverse (called reluctance matrix) which is diagonally dominant and more amenable to sparsification. However, direct truncation of matrix entries below a certain threshold introduces unacceptable error in transient analysis for the high sparsity ratios we are interested in. In this paper, we present a graph sparsification algorithm that preserves the eigenvalues of the reluctance matrix and results to sparse approximations that offer better and bounded accuracy in transient analysis. Experimental results indicate that sparsity ratios over 99% can be attained with a negligible error in transient analysis. © 2018 IEEE.