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A 2.45GHz power harvesting circuit in 90nm CMOS

Thumbnail
Autor
Giannakas, G.; Plessas, F.; Nassopoulos, G.; Stamoulis, G.
Fecha
2010
DOI
10.1109/ICECS.2010.5724642
Materia
Power harvesting
RF-to-DC
RFID
90nm CMOS
Design constraints
Design technique
Input power
Power conversion efficiencies
Rectifier topologies
Conversion efficiency
Cryptography
DC power transmission
Distillation
Harvesting
Electric rectifiers
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Resumen
In this work, an overview of the state-of-the-art of the design techniques of power harvesting (rectifYing) circuits is presented. The evolution of each circuit, the advantages and design constraints, are investigated and compared. Furthermore, a novel 2.45GHz power-harvesting circuit is implemented in 90nm CMOS. Using voltage and power conversion efficiency as a FOM, the optimum rectifier topology is determined. When input power is -19.73dBm, the proposed rectifier allows improving the Power and the Voltage Conversion Efficiency, achieving a PCE of 14.68% (for R L=1MΩ) and a VCE of 29.21%. ©2010 IEEE.
URI
http://hdl.handle.net/11615/27846
Colecciones
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ. [19735]

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