A 2.45GHz power harvesting circuit in 90nm CMOS
dc.creator | Giannakas, G. | en |
dc.creator | Plessas, F. | en |
dc.creator | Nassopoulos, G. | en |
dc.creator | Stamoulis, G. | en |
dc.date.accessioned | 2015-11-23T10:27:54Z | |
dc.date.available | 2015-11-23T10:27:54Z | |
dc.date.issued | 2010 | |
dc.identifier | 10.1109/ICECS.2010.5724642 | |
dc.identifier.isbn | 9781424481576 | |
dc.identifier.uri | http://hdl.handle.net/11615/27846 | |
dc.description.abstract | In this work, an overview of the state-of-the-art of the design techniques of power harvesting (rectifYing) circuits is presented. The evolution of each circuit, the advantages and design constraints, are investigated and compared. Furthermore, a novel 2.45GHz power-harvesting circuit is implemented in 90nm CMOS. Using voltage and power conversion efficiency as a FOM, the optimum rectifier topology is determined. When input power is -19.73dBm, the proposed rectifier allows improving the Power and the Voltage Conversion Efficiency, achieving a PCE of 14.68% (for R L=1MΩ) and a VCE of 29.21%. ©2010 IEEE. | en |
dc.source.uri | http://www.scopus.com/inward/record.url?eid=2-s2.0-79953096226&partnerID=40&md5=ce2352711d4948b1f64df6a9ebd7e8bf | |
dc.subject | Power harvesting | en |
dc.subject | RF-to-DC | en |
dc.subject | RFID | en |
dc.subject | 90nm CMOS | en |
dc.subject | Design constraints | en |
dc.subject | Design technique | en |
dc.subject | Input power | en |
dc.subject | Power conversion efficiencies | en |
dc.subject | Rectifier topologies | en |
dc.subject | Conversion efficiency | en |
dc.subject | Cryptography | en |
dc.subject | DC power transmission | en |
dc.subject | Distillation | en |
dc.subject | Harvesting | en |
dc.subject | Electric rectifiers | en |
dc.title | A 2.45GHz power harvesting circuit in 90nm CMOS | en |
dc.type | conferenceItem | en |
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