A low-power/low-noise readout circuit for integrated capacitive sensors

Abstract

A switched-capacitor integrated system is presented in this work that attains sub-fF measurement resolution in integrated capacitive sensors, with 1.5-kHz bandwidth and 50-mu W average power consumption in continuous function mode. The proposed design employs a pair of nonoverlapping clocks and an operational transconductance amplifier (OTA) that can be made as simple as a basic differential pair. The system exhibits 0.8% linearity error and 0.01 fF/degrees C temperature drift. It is appropriate for differential, absolute, and ratiometric capacitance measurements, and shows robustness against interconnection parasitics, transistor dimensional mismatch, and process variations, which are an important feature in the case of sensor-die CMOS postprocessing.