Tutto DSpace

Sfoglia per Soggetto "Detailed placement"

Items 1-6 di 6

    • Enhanced tetris legalization 

      Dadaliaris A.N., Nerantzaki E., Oikonomou P., Hatzaras Y., Troumpoulou A.-O., Arvanitakis I., Stamoulis G.I. (2016)
      Legalization and detailed placement methods for standard cell designs, are two of the most notable topics in current VLSI research. Being the final steps in a classic placement procedure they must be efficient in terms of ...

    • Exploiting Net Connectivity in Legalization and Detailed Placement Scenarios 

      Dadaliaris A., Kranas G., Oikonomou P., Floros G., Dossis M. (2022)
      Standard-cell placement is the fundamental step in a typical VLSI/ASIC design flow. Its result, paired with the outcome of the routing procedure can be the decisive factor in rendering a design manufacturable. Global ...

    • Performance evaluation of tetris-based legalization heuristics 

      Dadaliaris A.N., Oikonomou P., Nerantzaki E., Loukopoulos T., Koziri M.G., Stamoulis G.I. (2016)
      Algorithms for standard cell placement legalization have attracted significant research efforts in the past. A prominent member of this category is the Tetris algorithm which is a simple and particularly fast method for ...

    • RADPlace-MS: A Timing-Driven Placer and Optimiser for ASICs Radiation Hardening 

      Georgakidis C., Simoglou S., Sotiriou C. (2022)
      The manufacturing of modern Integrated Circuits (ICs), resistant against faults caused by ionising radiation, has become quite challenging due to the rapid advancement of VLSI technology. Additionally, the Radiation Hardening ...

    • RADPlace: A Timing-aware RAdiation-Hardening Detailed Placement Scheme Satisfying TMR Spacing Constraints 

      Georgakidis C., Lilitsis I., Stanimeropoulos G., Sotiriou C. (2021)
      The continuous evolution of VLSI technology as well as the device shrinking render the Integrated Circuits more susceptible to hazards caused by ionising radiation, as Soft Errors. Moreover, the Radiation Hardening process, ...

    • Redesign, Extensibility & Evaluation of a Placement Utilities Toolset 

      Kranas G.K., Dadaliaris A.N., Oikonomou P., Floros G., Dossis M. (2021)
      Placement is a step in the physical design associated with laying the cells of an integrated circuit in a designated area, so that timing, congestion, and utilization goals are met. Placement is a major step in physical ...