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  •   University of Thessaly Institutional Repository
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
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  •   University of Thessaly Institutional Repository
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ.
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Wafer Map Defect Pattern Recognition using Imbalanced Datasets

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Author
Tziolas T., Theodosiou T., Papageorgiou K., Rapti A., Dimitriou N., Tzovaras D., Papageorgiou E.
Date
2022
Language
en
DOI
10.1109/IISA56318.2022.9904402
Keyword
Classification (of information)
Convolution
Deep neural networks
Defects
Pattern recognition
Semiconductor device manufacture
Silicon wafers
Automatic inspection
Convolutional neural network
Defect patterns
Fabrication process
Imbalance processing
Imbalanced dataset
Semiconductor industry
Wafer fabrications
Wafer maps
WM-811k
Convolutional neural networks
Institute of Electrical and Electronics Engineers Inc.
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Abstract
The accurate and automatic inspection of wafer maps is vital for semiconductor engineers to identify defect causes and to optimize the wafer fabrication process. This research work seeks to address the pattern recognition task for the identification of defects in wafer maps, by developing a deep Convolutional Neural Network (CNN) classifier. The proposed CNN-based model utilizes various pre- and post-processing tools and is applied on the public but highly imbalanced industrial dataset WM-811K. To handle imbalance, a methodology of treating each class individually is proposed by applying different processing techniques for down-sampling, splitting and data augmentation based on the number of samples. The proposed model achieves 95.3% accuracy and 93.78% macro F1-score and outperformes other models in the related literature concerning the identification of the majority of classes. © 2022 IEEE.
URI
http://hdl.handle.net/11615/80265
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