On improving the speedup of slice and tile level parallelism in HEVC Using AVX2

Abstract

HEVC has emerged as the new video coding standard promising improved compression ratios (for the same quality) by up to 50% compared to H.264/AVC. To achieve this performance HEVC requires increased computational overhead compared to its predecessor. For this reason parallelism is used, usually at a coarse grained level, e.g., per slice or tile. In this paper we turn our attention towards further speeding up the HEVC encoding process by combining coarse grained parallelism with fine grained, in the form of AVX2 instructions implementing SIMD parallelism at SAD (Sum of Absolute Difference) and SSE (Sum of Squared Error) calculations. Experimental evaluation with common test video sequences illustrates that an additional reduction (in encoding time) of roughly 11% on average, compared to standalone coarse grained parallelism is achievable, leading in many cases to superlinear speedup.