dc.creator | Chatzigeorgiou C., Garyfallou D., Floros G., Evmorfopoulos N., Stamoulis G. | en |
dc.date.accessioned | 2023-01-31T07:43:50Z | |
dc.date.available | 2023-01-31T07:43:50Z | |
dc.date.issued | 2021 | |
dc.identifier | 10.1145/3394885.3431589 | |
dc.identifier.isbn | 9781450379991 | |
dc.identifier.uri | http://hdl.handle.net/11615/72612 | |
dc.description.abstract | During the past decade, Model Order Reduction (MOR) has become key enabler for the efficient simulation of large circuit models. MOR techniques based on moment-matching are well established due to their simplicity and computational performance in the reduction process. However, moment-matching methods based on the ordinary Krylov subspace are usually inadequate to accurately approximate the original circuit behaviour. In this paper, we present a moment-matching method which is based on the extended Krylov subspace and exploits the superposition property in order to deal with many terminals. The proposed method can handle large-scale regular and singular circuits, and generate accurate and efficient reduced-order models for circuit simulation. Experimental results on industrial IBM power grid benchmarks demonstrate that our method achieves an error reduction up to 83.69% over a standard Krylov subspace technique. © 2021 Association for Computing Machinery. | en |
dc.language.iso | en | en |
dc.source | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85100561419&doi=10.1145%2f3394885.3431589&partnerID=40&md5=a5f26dc0b06817183ec38710c862784c | |
dc.subject | Computer aided design | en |
dc.subject | Electric power transmission networks | en |
dc.subject | Timing circuits | en |
dc.subject | Computational performance | en |
dc.subject | Efficient simulation | en |
dc.subject | Krylov sub spaces | en |
dc.subject | Krylov subspace techniques | en |
dc.subject | Model order reduction | en |
dc.subject | Moment matching method | en |
dc.subject | Reduced order models | en |
dc.subject | Reduction process | en |
dc.subject | Circuit simulation | en |
dc.subject | Institute of Electrical and Electronics Engineers Inc. | en |
dc.title | Exploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models | en |
dc.type | conferenceItem | en |