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Large scale circuit simulation exploiting combinatorial multigrid on massively parallel architectures
dc.creator | Garyfallou D., Evmorfopoulos N., Stamoulis G. | en |
dc.date.accessioned | 2023-01-31T07:39:49Z | |
dc.date.available | 2023-01-31T07:39:49Z | |
dc.date.issued | 2018 | |
dc.identifier | 10.1109/MOCAST.2018.8376654 | |
dc.identifier.isbn | 9781538647882 | |
dc.identifier.uri | http://hdl.handle.net/11615/71980 | |
dc.description.abstract | The complexity of modern very large scale integrated circuits renders circuit simulation very essential in the design process, as it is the only feasible way to verify circuit's behaviour prior to manufacturing. The heart of circuit simulation relies on the solution of huge systems resulting after the modelling using Modified Nodal Analysis. Matrices arising in those systems are sparse Symmetric Diagonally Dominant (SDD) matrices, and as a result, iterative methods for efficiently manipulating them are very crucial to the performance of the simulation. In recent years, the emphasis has been placed on preconditioning methods which reduce the number of iterations for solving such systems, while significant advancements have been accomplished in efficient implementations on massively parallel architectures like GPUs. This paper presents a GPU-accelerated simulator, based on the Preconditioned Conjugate Gradient method, which exploits the Combinatorial Multigrid, a reliably efficient SDD solver based on support theory principles, for fast DC and transient analysis of large-scale circuits. Experimental results on IBM power grids, demonstrate speedups up to 4.56x and 5.10x for the PCG method and the CMG preconditioning algorithm, respectively, compared to the optimized CPU implementations. © 2018 IEEE. | en |
dc.language.iso | en | en |
dc.source | 2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018 | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85050084751&doi=10.1109%2fMOCAST.2018.8376654&partnerID=40&md5=5d9785cb7df251fd3045933879475c39 | |
dc.subject | Combinatorial circuits | en |
dc.subject | Conjugate gradient method | en |
dc.subject | Electric power transmission networks | en |
dc.subject | Parallel architectures | en |
dc.subject | Program processors | en |
dc.subject | Timing circuits | en |
dc.subject | Transient analysis | en |
dc.subject | Diagonally dominant | en |
dc.subject | Efficient implementation | en |
dc.subject | Large-scale circuits | en |
dc.subject | Modified nodal analysis | en |
dc.subject | Number of iterations | en |
dc.subject | Preconditioned conjugate gradient method | en |
dc.subject | Preconditioning method | en |
dc.subject | Very large scale integrated circuit | en |
dc.subject | Circuit simulation | en |
dc.subject | Institute of Electrical and Electronics Engineers Inc. | en |
dc.title | Large scale circuit simulation exploiting combinatorial multigrid on massively parallel architectures | en |
dc.type | conferenceItem | en |
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