On emulating hardware/software co-designed control algorithms for packet switches

Abstract

Hardware accelerators in networking systems for control algorithms offer a promising approach to scale performance. To that end, several research efforts have been devoted to verify a hardware version of complex control algorithms but only for small-scale hardware unit tests. In this paper we propose and evaluate an emulation framework, in which such control algorithm accelerators can be integrated to design a packet switch, able both to forward real traffic and to enable extensive experimental evaluation and demonstration scenarios. As a case study, we have integrated in the proposed framework a Belief-Propagation-driven algorithm accelerator for multicast packet scheduling. Copyright © 2014 ICST.