Implementation and performance comparison of the motion compensation kernel of the AVS video decoder on FPGA, GPU and multicore processors

Abstract

Next generation video standards have strict and increasing performance demands due to real-time requirements and the trend towards higher frame resolutions and bit rates. Leveraging the advantages of reconfigurable logic and emerging multi-core processor architectures to exploit all levels of parallelism of such workloads is necessary to achieve real time functionality at a reasonable cost. © 2011 IEEE.