Implementation of the AVS video decoder on a heterogeneous dual-core SIMD processor

Abstract

This paper presents the implementation of Advanced Audio and Video Standard Part 2: Video (AVS P2), the Chinese video standard, to Diamond 388VDO Video Processor, a heterogeneous dual core Tensilica SIMD processor. Through the process of mapping AVS video decoder to 388VDO we aim to explore and exploit the different forms of parallelism inherent in a video application in order to speedup AVS decoding and achieve real time functionality. ©2010 IEEE.