• Exploring the Effects of Code Optimizations on CPU Frequency Margins 

      Parasyris K., Bellas N., Antonopoulos C.D., Lalis S. (2018)
      Chip manufactures introduce redundancy at various levels of CPU design to guarantee correct operation even for worst-case combinations of non-idealities in process variation and system operation conditions. This redundancy ...
    • Significance-aware program execution on unreliable hardware 

      Parasyris K., Vassiliadis V., Antonopoulos C.D., Lalis S., Bellas N. (2017)
      This article introduces a significance-centric programming model and runtime support that sets the supply voltage in a multicore CPU to sub-nominal values to reduce the energy footprint and provide mechanisms to control ...