• Graph-based STA for asynchronous controllers 

      Simoglou S., Xiromeritis N., Sotiriou C., Sketopoulos N. (2020)
      We present a Graph-based Asynchronous Static Timing Analysis (ASTA) methodology for Asynchronous Control Circuits, which pessimistically computes Critical Cycle(s), instead of Critical Paths, without cycle cutting. Its ...
    • On formulating and tackling Integrated circuit placement as a scheduling problem 

      Oikonomou P., Loukopoulos T., Dadaliaris A.N., Koziri M.G., Stamoulis G.I. (2015)
      Integrated circuit (IC) placement consists of placing the cells of the IC on a chip plane so that overall performance is optimized. Various performance criteria have been considered with the most common being wire length. ...