dc.creator | Krommydas, K. | en |
dc.creator | Tsoublekas, G. | en |
dc.creator | Antonopoulos, C. D. | en |
dc.creator | Bellas, N. | en |
dc.date.accessioned | 2015-11-23T10:37:07Z | |
dc.date.available | 2015-11-23T10:37:07Z | |
dc.date.issued | 2010 | |
dc.identifier | 10.1109/ICME.2010.5582558 | |
dc.identifier.isbn | 9781424474912 | |
dc.identifier.uri | http://hdl.handle.net/11615/30054 | |
dc.description.abstract | Modern multimedia workloads provide increased levels of quality and compression efficiency at the expense of substantially increased computational complexity. It is important to leverage the off-the-shelf emerging multi-core processor architectures and exploit all levels of parallelism of such workloads in order to achieve real time functionality at a reasonable cost. This paper presents the implementation, optimization and characterization of the AVS video decoder on Intel Core i7, a quad-core, hyper-threaded, chip multiprocessor (CMP). AVS (Audio Video Standard), a new compression standard from China, is competing with H.264 to potentially replace MPEG-2, mainly in the Chinese market. We show that it is necessary to perform a. © 2010 IEEE. | en |
dc.source.uri | http://www.scopus.com/inward/record.url?eid=2-s2.0-78349294531&partnerID=40&md5=bf7482c46cdc24b87ddaf3624e914b0c | |
dc.subject | AVS | en |
dc.subject | Chip multiprocessor | en |
dc.subject | Video decoding | en |
dc.subject | Audio videos | en |
dc.subject | Chinese markets | en |
dc.subject | Chip multiprocessors | en |
dc.subject | Compression efficiency | en |
dc.subject | Compression standards | en |
dc.subject | Multi-core processor | en |
dc.subject | Multimedia workloads | en |
dc.subject | Real time | en |
dc.subject | Video decoders | en |
dc.subject | Computational complexity | en |
dc.subject | Computer architecture | en |
dc.subject | Decoding | en |
dc.subject | Image compression | en |
dc.subject | Motion Picture Experts Group standards | en |
dc.subject | Multiprocessing systems | en |
dc.subject | Optimization | en |
dc.subject | Microprocessor chips | en |
dc.title | Mapping and optimization of the AVS video decoder on a high performance chip multiprocessor | en |
dc.type | conferenceItem | en |