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dc.creatorBountas, D.en
dc.creatorStamoulis, G. I.en
dc.date.accessioned2015-11-23T10:24:08Z
dc.date.available2015-11-23T10:24:08Z
dc.date.issued2006
dc.identifier.isbn3-540-36410-2
dc.identifier.issn0302-9743
dc.identifier.urihttp://hdl.handle.net/11615/26421
dc.description.abstractWe present a soft error rate (SER) analysis methodology within a simulation and design environment that covers a broad spectrum of design problems and parameters. Our approach includes modeling of the particle hit at the transistor level, fast Monte-Carlo type simulation to obtain the latching probability of a particle hit on all nodes of the circuit, embedded timing analysis to obtain the latching window, and fine-grained accounting of the electrical masking effects to account for both the effects of scaling and of pulse duration versus the period of the system clock to get an estimate of the maximum SER of the circuit. This approach has been implemented in CARROT and placed under a broad design environment to assess design tradeoffs with SER as a parameter.en
dc.sourceEmbedded Computer Systems: Architectures, Modeling, and Simulation, Proceedingsen
dc.source.uri<Go to ISI>://WOS:000239423500034
dc.subjectSERen
dc.subjectcombinational circuitsen
dc.subjectsimulationen
dc.subjectTRANSIENT FAULTSen
dc.subjectSIMULATIONen
dc.subjectComputer Science, Hardware & Architectureen
dc.subjectComputer Science, Softwareen
dc.subjectEngineeringen
dc.subjectComputer Science, Theory & Methodsen
dc.subjectTelecommunicationsen
dc.titleCARROT - A tool for fast and accurate soft error rate estimationen
dc.typebookChapteren


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