Πλοήγηση ανά Θέμα "Integrated circuit layout"
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A Layout-Based Soft Error Rate Estimation and Mitigation in the Presence of Multiple Transient Faults in Combinational Logic
(2020)Cosmic radiation resulting in transient faults to the combinational logic of Integrated Circuits (ICs), constitutes a major reliability concern for space applications. In addition, continuous technology shrinking allows ... -
A Placement-Aware Soft Error Rate Estimation of Combinational Circuits for Multiple Transient Faults in CMOS Technology
(2019)A considerable disadvantage that comes with the downscaling of the CMOS technology is the ever-increasing susceptibility of Integrated Circuits (ICs) to soft errors. Therefore, the study of the radiation-induced transient ...