Browsing by Subject "Buses"
Now showing items 1-5 of 5
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Combined forecasting system for short-term bus load forecasting based on clustering and neural networks
(2020)Micro-grids as 'micro-graphs' of the power systems involve the management of small loads, either isolated or connected to the main grid. Load forecasting is a tool of fundamental importance in power systems design and ... -
High-speed optical cache memory as single-level shared cache in chip-multiprocessor architectures
(2015)We present an optical bus-based Chip Multiprocessor architecture where the processing cores share an optical single-level cache unit. Physically, the optical cache is implemented externally in a separate chip located next ... -
Links between network topology and socioeconomic framework of railway transport: Evidence from Greece
(2017)This paper studies the Greek railway network (GRAN) by using complex network analysis (CNA) and empirical approach. The study aims to detect the socioeconomic information immanent to the GRAN's topology and to provide ... -
Mitigating Bunching with Bus-Following Models and Bus-to-Bus Cooperation
(2021)Bus bunching is an instability problem where buses operating on high-frequency public transport lines arrive at stops in bunches. This work unveils that bus-following models can be used to design bus-to-bus cooperative ... -
An optically-enabled chip-multiprocessor architecture using a single-level shared optical cache memory
(2016)We present an optical bus-based chip-multiprocessor architecture where the processing cores share an optical single-level cache implemented in a separate chip next to the Central-Processing-Unit (CPU) die. The interconnection ...