Πλοήγηση ανά Συγγραφέα "Nikolopoulos, D. S."
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Algorithm, software, and hardware optimizations for Delaunay mesh generation on simultaneous multithreaded architectures
Antonopoulos, C. D.; Blagojevic, F.; Chernikov, A. N.; Chrisochoides, N. P.; Nikolopoulos, D. S. (2009)This article focuses on the optimization of PCDM, a parallel, two-dimensional (2D) Delaunay mesh generation application, and its interaction with parallel architectures based on simultaneous multithreading (SMT) processors. ... -
Dynamic binary rewriting and migration for shared-ISA asymmetric, multicore processors: Summary
Georgakoudis, G.; Lalis, S.; Nikolopoulos, D. S. (2012) -
Energy Efficiency through Significance-Based Computing
Nikolopoulos, D. S.; Vandierendonck, H.; Bellas, N.; Antonopoulos, C. D.; Lalis, S.; Karakonstantis, G.; Burg, A.; Naumann, U. (2014)An extension of approximate computing, significance-based computing exploits applications' inherent error resiliency and offers a new structural paradigm that strategically relaxes full computational precision to provide ... -
Exploring new search algorithms and hardware for phylogenetics: RAxML meets the IBM cell
Stamatakis, A.; Blagojevic, F.; Nikolopoulos, D. S.; Antonopoulos, C. D. (2007)Phylogenetic inference is considered to be one of the grand challenges in Bioinformatics due to the immense computational requirements. RAxML is currently among the fastest and most accurate programs for phylogenetic tree ... -
Fast dynamic binary rewriting for flexible thread migration on shared-ISA heterogeneous MPSoCs
Georgakoudis, G.; Nikolopoulos, D. S.; Vandierendonck, H.; Lalis, S. (2014)Heterogeneous MPSoCs where different types of cores share a baseline ISA but implement different operational accelerators combine programmability with flexible customization. They hold promise for high performance under ... -
Fast dynamic binary rewriting to support thread migration in shared-ISA asymmetric multicores
Georgakoudis, G.; Nikolopoulos, D. S.; Lalis, S. (2013)Asymmetric multicore processors have demonstrated a strong potential for improving performance and energy-efficiency. Shared-ISA asymmetric multicore processors overcome pro- grammability problems in disjoint-ISA systems ... -
A multigrain Delaunay mesh generation method for multicore SMT-based architectures
Antonopoulos, C. D.; Blagojevic, F.; Chernikov, A. N.; Chrisochoides, N. P.; Nikolopoulos, D. S. (2009)Given the proliferation of layered, multicore- and SMT-based architectures, it is imperative to deploy and evaluate important, multi-level, scientific computing codes, such as meshing algorithms, on these systems. We focus ... -
Prediction-based power-performance adaptation of multithreaded scientific codes
Curtis-Maury, M.; Blagojevic, F.; Antonopoulos, C. D.; Nikolopoulos, D. S. (2008)Computing has recently reached an inflection point with the introduction of multicore processors. On-chip thread-level parallelism is doubling approximately every other year. Concurrency lends itself naturally to allowing ... -
A programming model and runtime system for significance-aware energy-efficient computing
Vassiliadis, V.; Parasyris, K.; Chalios, C.; Antonopoulos, C. D.; Lalis, S.; Bellas, N.; Vandierendonck, H.; Nikolopoulos, D. S. (2015)We introduce a task-based programming model and runtime system that exploit the observation that not all parts of a program are equally significant for the accuracy of the end-result, in order to trade off the quality of ... -
Runtime scheduling of dynamic parallelism on accelerator-based multi-core systems
Blagojevic, F.; Nikolopoulos, D. S.; Stamatakis, A.; Antonopoulos, C. D.; Curtis-Maury, M. (2007)We explore runtime mechanisms and policies for scheduling dynamic multi-grain parallelism on heterogeneous multicore processors. Heterogeneous multi-core processors integrate conventional cores that run legacy codes with ...