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Linear current-to-time converter

dc.creatorVlassis S., Souliotis G., Plessas F.en
dc.date.accessioned2023-01-31T11:37:02Z
dc.date.available2023-01-31T11:37:02Z
dc.date.issued2019
dc.identifier10.1109/DTIS.2019.8734952
dc.identifier.isbn9781728134246
dc.identifier.urihttp://hdl.handle.net/11615/80685
dc.description.abstractIn this work, a new current-to-time converter (CDC) based on current-starved inverter is proposed. The time delay of the output pulse edges is linearly proportional to a control current. The benefits of the proposed topology are simple circuit topology, linear current-to-time characteristic with positive or negative slope for both rising and falling edges. The circuit is designed and tested using 0.35um CMOS process under 3V supply voltage. The linearity error is less than 2.1% in a range of 5nsec of time delays with a clock frequency of 50MHz. © 2019 IEEE.en
dc.language.isoenen
dc.sourceProceedings - 2019 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019en
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85068457649&doi=10.1109%2fDTIS.2019.8734952&partnerID=40&md5=4e397e55fe5bac1e04c5cb537587f617
dc.subjectElectric signal systemsen
dc.subjectIntegrated controlen
dc.subjectNanotechnologyen
dc.subjectSignal encodingen
dc.subjectTime delayen
dc.subjectTopologyen
dc.subjectAnalogen
dc.subjectLinear currentsen
dc.subjectLinearity errorsen
dc.subjectLinearly proportionalen
dc.subjectMixed-signal circuitsen
dc.subjectTime characteristicsen
dc.subjectTime-domain signalen
dc.subjectVoltage-to-time converteren
dc.subjectMixed signal integrated circuitsen
dc.subjectInstitute of Electrical and Electronics Engineers Inc.en
dc.titleLinear current-to-time converteren
dc.typeconferenceItemen


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