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dc.creatorVlassis S., Souliotis G., Plessas F.en
dc.date.accessioned2023-01-31T11:37:01Z
dc.date.available2023-01-31T11:37:01Z
dc.date.issued2019
dc.identifier10.1109/MOCAST.2019.8741800
dc.identifier.isbn9781728111841
dc.identifier.urihttp://hdl.handle.net/11615/80684
dc.description.abstractThis paper presents the designs of analog CMOS current squaring circuit and four-quadrant multiplier which are capable for operation under ultra-low supply voltage. The design approach is based on CMOS devices operated in the weak inversion and on its exponential I/V characteristic. Both circuits employ the ultra-low supply voltage of 0.5V and achieve very low static power consumption. The constant gain bandwidth is about 0.1MHz for both circuits. Total harmonic distortion at 100kHz is -52dB and -36dB with power consumption 13μ W and 18μ W for the squarer and multiplier, respectively. Theirs performances were verified by simulations using transistor's models of standard 0.18μ m CMOS process. © 2019 IEEE.en
dc.language.isoenen
dc.source2019 8th International Conference on Modern Circuits and Systems Technologies, MOCAST 2019en
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85068547384&doi=10.1109%2fMOCAST.2019.8741800&partnerID=40&md5=e9f5296fa46c7dbbaaa27aaa22efc0c4
dc.subjectElectric power utilizationen
dc.subjectFrequency multiplying circuitsen
dc.subjectArithmetic circuiten
dc.subjectCurrent modeen
dc.subjectDesign approachesen
dc.subjectFour-quadrant multiplieren
dc.subjectLow supply voltagesen
dc.subjectLow voltagesen
dc.subjectTotal harmonic distortion (THD)en
dc.subjectUltra-low-voltageen
dc.subjectCMOS integrated circuitsen
dc.subjectInstitute of Electrical and Electronics Engineers Inc.en
dc.titleUltra Low-Voltage Current Squaring and Multiplieren
dc.typeconferenceItemen


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