dc.creator | Vlassis S., Souliotis G., Plessas F. | en |
dc.date.accessioned | 2023-01-31T11:37:01Z | |
dc.date.available | 2023-01-31T11:37:01Z | |
dc.date.issued | 2019 | |
dc.identifier | 10.1109/MOCAST.2019.8741800 | |
dc.identifier.isbn | 9781728111841 | |
dc.identifier.uri | http://hdl.handle.net/11615/80684 | |
dc.description.abstract | This paper presents the designs of analog CMOS current squaring circuit and four-quadrant multiplier which are capable for operation under ultra-low supply voltage. The design approach is based on CMOS devices operated in the weak inversion and on its exponential I/V characteristic. Both circuits employ the ultra-low supply voltage of 0.5V and achieve very low static power consumption. The constant gain bandwidth is about 0.1MHz for both circuits. Total harmonic distortion at 100kHz is -52dB and -36dB with power consumption 13μ W and 18μ W for the squarer and multiplier, respectively. Theirs performances were verified by simulations using transistor's models of standard 0.18μ m CMOS process. © 2019 IEEE. | en |
dc.language.iso | en | en |
dc.source | 2019 8th International Conference on Modern Circuits and Systems Technologies, MOCAST 2019 | en |
dc.source.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85068547384&doi=10.1109%2fMOCAST.2019.8741800&partnerID=40&md5=e9f5296fa46c7dbbaaa27aaa22efc0c4 | |
dc.subject | Electric power utilization | en |
dc.subject | Frequency multiplying circuits | en |
dc.subject | Arithmetic circuit | en |
dc.subject | Current mode | en |
dc.subject | Design approaches | en |
dc.subject | Four-quadrant multiplier | en |
dc.subject | Low supply voltages | en |
dc.subject | Low voltages | en |
dc.subject | Total harmonic distortion (THD) | en |
dc.subject | Ultra-low-voltage | en |
dc.subject | CMOS integrated circuits | en |
dc.subject | Institute of Electrical and Electronics Engineers Inc. | en |
dc.title | Ultra Low-Voltage Current Squaring and Multiplier | en |
dc.type | conferenceItem | en |