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An RTL-to-grid design flow for power grid verification based on a statistical estimation engine

dc.creatorKarampatzakis, D. P.en
dc.creatorEvmorfopoulos, N. E.en
dc.creatorTsiampas, M. K.en
dc.creatorStamoulis, G. I.en
dc.date.accessioned2015-11-23T10:33:15Z
dc.date.available2015-11-23T10:33:15Z
dc.date.issued2006
dc.identifier.isbn9781424401574
dc.identifier.isbn1424401577
dc.identifier.urihttp://hdl.handle.net/11615/29023
dc.description.abstractThe most important reliability problem of modern power distribution networks is the voltage drop or IR-drop problem. In this paper we present a design flow based on industrial tools for power grid verification, where the grid is modeled as a linear resistive network and the necessary maximum current estimates are statistically obtained by recent advances in the field of extreme value theory. Experimental results include the verification of power grid for a choice of different real designs. © 2006 IEEE.en
dc.source.urihttp://www.scopus.com/inward/record.url?eid=2-s2.0-34547323489&partnerID=40&md5=d09ad86b65206e726e74c27bd50d6c36
dc.subjectElectric conductivityen
dc.subjectElectric potentialen
dc.subjectStatistical methodsen
dc.subjectVoltage controlen
dc.subjectPower grid verificationen
dc.subjectPower gridsen
dc.subjectResistive networksen
dc.subjectElectric power distributionen
dc.titleAn RTL-to-grid design flow for power grid verification based on a statistical estimation engineen
dc.typeconferenceItemen


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