dc.creator | Giannakas, G. | en |
dc.creator | Plessas, F. | en |
dc.creator | Stamoulis, G. | en |
dc.date.accessioned | 2015-11-23T10:27:55Z | |
dc.date.available | 2015-11-23T10:27:55Z | |
dc.date.issued | 2012 | |
dc.identifier | 10.1049/el.2011.3576 | |
dc.identifier.issn | 0013-5194 | |
dc.identifier.uri | http://hdl.handle.net/11615/27847 | |
dc.description.abstract | A novel 2.45 GHz RF power harvester has been implemented in a 90 nm standard CMOS process. The proposed architecture reduces the threshold voltage (Vth) by employing a pseudo floating-gate (pseudo-FG) new technique and achieves better performance compared with other conventional rectifiers at 90 nm and 2.45 GHz, without additional fabrication cost. The system is initially optimised via a matching-boosting circuit, which has a dominant dual role. Extremely low power (-15.43 dBm) RF signals can be rectified and converted to 1.25 V DC. | en |
dc.source | Electronics Letters | en |
dc.source.uri | <Go to ISI>://WOS:000303158500036 | |
dc.subject | RFID APPLICATIONS | en |
dc.subject | POWER | en |
dc.subject | DESIGN | en |
dc.subject | SENSOR | en |
dc.subject | Engineering, Electrical & Electronic | en |
dc.title | Pseudo-FG technique for efficient energy harvesting | en |
dc.type | journalArticle | en |