Πλοήγηση ανά Θέμα "Timing circuits"
Αποτελέσματα 1-20 από 48
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Accelerating Electromigration Stress Analysis Using Low-Rank Balanced Truncation
(2022)Electromigration (EM) has become one of the most significant challenges considering longterm reliability in integrated circuit design. The problem is caused by the large current density in circuit interconnections. However, ... -
Accurate Estimation of Dynamic Timing Slacks using Event-Driven Simulation
(2020)The pessimistic nature of conventional static timing analysis has turned the attention of many studies to the exploitation of the dynamic data-dependent excitation of paths. Such studies may have revealed extensive dynamic ... -
Adaptive Operation-Based ALU and FPU Clocking
(2020)The operating clock period in modern circuits is designated under worst-case operating conditions, in order to ensure error free functionality. To accomplish this goal, designers take into account the timing of the circuit ... -
Adjusting the parameters of metal oxide gapless surge arresters' equivalent circuits using the harmony search method
(2017)The appropriate circuit modeling of metal oxide gapless surge arresters is critical for insulation coordination studies. Metal oxide arresters present a dynamic behavior for fast front surges; namely, their residual voltage ... -
Assessing the effect of human factors in healthcare cyber security practice: An empirical study
(2021)In last decades, neuromorphic circuits have received widespread attention across various scientific fields. Such circuits mathematically model the behaviour of biological neurons, synapses as well as their interaction. ... -
Assessing the Learning Process Playing with Kahoot – A Study with Upper Secondary School Pupils Learning Electrical Circuits
(2018)The present study investigates the extent to which the popular game-based online platform of Kahoot can be used as a creative and effective tool in the teaching practice and specifically in the teaching of basic concepts ... -
CAS-HtBase: a new database for the study of HTs at the pre-silicon stage of ASICs
(2022)Hardware Trojan (HT) consists a chip-level viruses which aim to leak encrypted information or degrade the performance of the infected device. They are a modification to the original design of a circuit and consist of two ... -
Cognitive d2d finite blocklength transmissions with the presence of time-selective interference
(2021)In this paper, we study an underlay device-to-device (D2D) communication system where the secondary D2D transmitter (DTx) communicates with D2D receiver (DRx) under ultra-reliable low-latency communication (URLLC) constraints. ... -
A Combinatorial Multigrid Preconditioned Iterative Method for Large Scale Circuit Simulation on GPU s
(2018)Efficient large scale circuit simulation is among the most challenging problems facing the EDA industry today, since it is the only feasible way to verify a circuit's behaviour prior to manufacturing. In recent years, the ... -
Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits
(2021)In this article, unlike almost all state-of-The-Art obfuscation solutions that focus on functional/logic obfuscation, we introduce a new paradigm, called data flow obfuscation, which exploits the essence of asynchronicity. ... -
Effect of Actual Recuperators’ Effectiveness on the Attainable Efficiency of Supercritical CO2 Brayton Cycles for Solar Thermal Power Plants
(2022)One of the most promising concentrated solar power technologies is the central receiver tower power station with heliostat field, which has attracted renewed research interest in the current decade. The introduction of the ... -
Efficient Circuit Reduction in Limited Frequency Windows
(2019)Model Order Reduction (MOR) has become key enabler for the efficient simulation of large circuit models. MOR techniques based on Balanced Truncation (BT) offer very good error estimates and can provide compact models with ... -
Efficient IC hotspot thermal analysis via low-rank Model Order Reduction
(2019)Efficient full-chip thermal simulation is among the most challenging problems facing the EDA industry today, due to the need for solution of very large systems of equations that require unreasonably long computational ... -
Efficient linear system solution techniques in the simulation of large dense mutually inductive circuits
(2019)The verification of integrated Circuits (ICs) in deep submicron technologies requires that all mutual inductive effects are taken into account to properly validate the performance and reliable operation of the chip. However, ... -
Efficient sparsification of dense circuit matrices in model order reduction
(2019)The integration of more components into ICs due to the ever increasing technology scaling has led to very large parasitic networks consisting of million of nodes, which have to be simulated in many times or frequencies to ... -
EVT-based worst case delay estimation under process variation
(2018)Manufacturing process variation in sub-20nm processes has introduced ever increasing overhead in Static Timing Analysis (STA) in order to guarantee the reliable operation of the circuit. Chip designers apply corner-based ... -
Exploiting Extended Krylov Subspace for the Reduction of Regular and Singular Circuit Models
(2021)During the past decade, Model Order Reduction (MOR) has become key enabler for the efficient simulation of large circuit models. MOR techniques based on moment-matching are well established due to their simplicity and ... -
A Fast Timing Separation of Events Algorithm for Concurrent Systems
(2019)In this work, we present a fast, polynomial time implementation of the Timing Separation of Events (TSE) Algorithm, with complexity O(E × (V+E). TSE computation is a fundamental problem in the analysis of event-driven, ... -
Finite element-based assessment of energy harvesting in composite beams with piezoelectric transducers
(2022)A finite element-based methodology is introduced for studying composite beams with piezoelectric transducers connected to energy harvesting circuits. Continuous and lumped-parameter models are developed based on finite ... -
Frequency-Limited Reduction of Regular and Singular Circuit Models Via Extended Krylov Subspace Method
(2020)During the past decade, model order reduction (MOR) has become key enabler for the efficient simulation of large circuit models. MOR techniques based on balanced truncation (BT) offer very good error estimates and can ...