Browsing by Subject "Process Variation"
Now showing items 1-5 of 5
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EVT-based worst case delay estimation under process variation
(2018)Manufacturing process variation in sub-20nm processes has introduced ever increasing overhead in Static Timing Analysis (STA) in order to guarantee the reliable operation of the circuit. Chip designers apply corner-based ... -
Increasing the Profit of Cloud Providers through DRAM Operation at Reduced Margins
(2020)Energy reduction is a key objective in cloud computing, and DRAM memories are responsible for an important amount of the energy consumption of data center nodes. Vendors adopt very conservative margins for DRAM operating ... -
Investigation on Performance, Power, Area Trade-Offs using Deterministic and Monte-Carlo Process Variation Aware Synthesis Flows
(2022)Process variation has proven to be one of the higher impacting factors in modern Application-Specific Integrated Circuit (ASIC) flows Quality of Results (QoR). On the one hand, the excessive MOSFET shrinking, in combination ... -
On the statistical memory architecture exploration and optimization
(2015)The worsening of process variations and the consequent increased spreads in circuit performance and consumed power hinder the satisfaction of the targeted budgets and lead to yield loss. Corner based design and adoption ... -
TKtimer: Fast & accurate clock network pessimism removal
(2015)As integrated circuit process technology progresses into the deep sub-micron region, the phenomenon of process variation has a growing impact on the design and analysis of digital circuits and more specifically in the ...