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    • Low power monolithic 3D IC design of asynchronous AES core 

      Penmetsa N.L., Sotiriou C., Lim S.K. (2015)
      In this paper, we demonstrate, for the first time, that a monolithic 3D implementation of an asynchronous AES encryption core can achieve up to 50.3% footprint reduction, 25.7% improvement in power, 34.3% shorter wirelength ...