Πλοήγηση ανά Θέμα "Voltage drop"
Αποτελέσματα 1-6 από 6
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Characterization of the worst-case current waveform excitations in general RLC-model power grid analysis
(2010)Validating the robustness of power distribution in modem IC design is a crucial but very difficult problem, due to the vast number of possible working modes and the high, operating frequencies which necessitate the modeling ... -
A power grid analysis and verification tool based on a statistical prediction engine
(2010)Voltage drops are one of the most stringent problems in modern IC implementation, which is exacerbated by the ever decreasing transistor sizes and interconnect line widths. In order to find the true worst case voltage drop ... -
Power, performance and area prediction of 3D ICs during early stage design exploration in 45nm
(2011)In this work, the impact of across-chip temperature and power supply voltage variations, on performance predictions in 3D ICs, is investigated. To make this possible, a novel design flow is proposed to perform design ... -
A power-supply noise aware dynamic timing analysis methodology, based on a statistical prediction engine
(2018)As technologies continue to shrink, industry seeks even faster ultra-low power ICs, requiring more accurate estimation of the worst case delay. Although traditional Static Timing Analysis (STA) methods incorporate data ... -
SCIZER: A scalable placement visualizer/analyzer
(2017)The major design challenges of ASIC design, like power dissipation, timing, voltage-drop, interconnect and reliability are tackled during the Physical Design phase of any flow. The placement procedure can significantly ... -
Voltage-drop-constrained optimization of power distribution network based on reliable maximum current estimates
(2004)The problem of optimum design of tree-shaped power distribution networks with respect to the voltage drop effect is addressed in this paper. An approach for the width adjustment of the power lines supplying the circuit's ...