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Browsing by Subject "Worst case scenario"

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    • Adaptive Operation-Based ALU and FPU Clocking 

      Tziouvaras A., Dimitriou G., Dossis M., Stamoulis G. (2020)
      The operating clock period in modern circuits is designated under worst-case operating conditions, in order to ensure error free functionality. To accomplish this goal, designers take into account the timing of the circuit ...

    • The Impact of CPU Voltage Margins on Power-Constrained Execution 

      Koutsovasilis P., Antonopoulos C.D., Bellas N., Lalis S., Papadimitriou G., Chatzidimitriou A., Gizopoulos D. (2022)
      CPUs typically operate at a voltage which is higher than what is strictly required, using voltage margins to account for process variability and anticipate any combination of adverse operating conditions. However, these ...