• English
    • Ελληνικά
    • Deutsch
    • français
    • italiano
    • español
  • français 
    • English
    • Ελληνικά
    • Deutsch
    • français
    • italiano
    • español
  • Ouvrir une session
Voir le document 
  •   Accueil de DSpace
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ.
  • Voir le document
  •   Accueil de DSpace
  • Επιστημονικές Δημοσιεύσεις Μελών ΠΘ (ΕΔΠΘ)
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ.
  • Voir le document
JavaScript is disabled for your browser. Some features of this site may not work without it.
Tout DSpace
  • Communautés & Collections
  • Par date de publication
  • Auteurs
  • Titres
  • Sujets

Comparison of three resistor network division circuits for the readout of 4 x 4 pixel SiPM arrays

Thumbnail
Auteur
Stratos, D.; Maria, G.; Eleftherios, F.; George, L.
Date
2013
DOI
10.1016/j.nima.2012.08.006
Sujet
Dedicated imaging
Positron emission tomography (PET)
Combined PET/MR
Resistor network
Scintillator detectors
Silicon photomultipliers
(SiPMs)
RESOLUTION
PET
SYSTEM
Instruments & Instrumentation
Nuclear Science & Technology
Physics,
Particles & Fields
Spectroscopy
Afficher la notice complète
Résumé
The purpose of this study is to investigate the behavior of a flexible SensL's silicon photomultiplier array (SPMArray4) photodetector for possible applications in PET imaging. We have designed and evaluated three different resistor network division circuits to read out the signal outputs of a 4 x 4 pixel SiPM array. We have applied firstly (i) a symmetric resistive voltage division circuit, secondly (ii) a symmetric resistive charge division circuit and thirdly (iii) a charge division multiplexing resistor network reducing the 16 pixel outputs to 4 position signals. In the first circuit the SensL SPMArray4-A0 preamplification electronics and a SPMArray4-A1 evaluation board providing the 16 pixels voltage outputs were used, before the symmetric resistive voltage network. We reduced the 16 voltage signals firstly to 4X and 4Y coordinate signals. Then those signals were further reduced to 2X and 2Y position signals connected via a resistor network. In the second readout circuit we have used the same technique but without the preamplification stage. The third circuit is based on a discretized positioning circuit, which multiplexes the 16 signals from the SiPM array to 4 position signals. The 4 position signals (Xa, Xb, Ye and Yd) were digitized using a free running sampling technique. An FPGA (Spartan 6 LX16) was used for triggering and signal processing of the pulses. We acquired raw images and energy histograms of a BGO and a CsI:Na pixilated scintillator under Na-22 excitation. A clear visualization of the discrete 2 x 2 x 5 mm(3) pixilated BGO scintillator elements as well as the 1 x 1 x 5 mm(3) pixilated CsI:Na crystal array was achieved with all applied readout circuits. The symmetric resistive charge division circuit provides higher peak to valley ratio than the other readout circuits. The sensitivity and the energy resolution remained almost constant for the three circuits. (C) 2012 Elsevier B.V. All rights reserved.
URI
http://hdl.handle.net/11615/33458
Collections
  • Δημοσιεύσεις σε περιοδικά, συνέδρια, κεφάλαια βιβλίων κλπ. [19743]
htmlmap 

 

Parcourir

Tout DSpaceCommunautés & CollectionsPar date de publicationAuteursTitresSujetsCette collectionPar date de publicationAuteursTitresSujets

Mon compte

Ouvrir une sessionS'inscrire
Help Contact
DepositionAboutHelpContactez-nous
Choose LanguageTout DSpace
EnglishΕλληνικά
htmlmap