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      Gate Delay Estimation with Library Compatible Current Source Models and Effective Capacitance 

      Garyfallou D., Simoglou S., Sketopoulos N., Antoniadis C., Sotiriou C.P., Evmorfopoulos N., Stamoulis G. (2021)
      As process geometries shrink below 45 nm, accurate and efficient gate-level timing analysis becomes even more challenging. Modern VLSI interconnects are more resistive, signals no longer resemble saturated ramps, and gate ...
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      Response prediction for horizontally loaded pile groups 

      Comodromos, E. M. (2003)
      The load-deflection curve simulating the response of pile foundation under horizontal loading is indispensable for the design of piles to resist lateral loads. A static horizontal pile load test or even an adequate p-y ...
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      Testing scalability and performance of decentralized on-line social networks 

      Goutsias K., Spathoulas G., Anagnostopoulos I. (2016)
      During the last years, a lot of research has been conducted in the field of Decentralized Online Social Networks (DOSNs). Due to limited dependency on a dedicated central-based infrastructure, such kind of social networking ...
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