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Πλοήγηση ανά Θέμα "Hardware"

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    • Compiler transformations in hardware synthesis of Mpeg2 codes 

      Chatzianastasiou G., Tsakyridis A., Dimitriou G., Stamoulis G., Dossis M. (2016)
      High-level synthesis is the technique that translates high-level programming language programs into equivalent hardware descriptions. The use of conventional programming languages as input to high-level synthesis is ...

    • Computational methods and optimizations for containment and complementarity in web data cubes 

      Meimaris M., Papastefanatos G., Vassiliadis P., Anagnostopoulos I. (2018)
      The increasing availability of diverse multidimensional data on the web has led to the creation and adoption of common vocabularies and practices that facilitate sharing, aggregating and reusing data from remote origins. ...

    • Downlink multi-user transmission for higher user speeds in IEEE 802.16m 

      Papathanasiou, C.; Dimitriou, N.; Tassiulas, L. (2009)
      A dynamic resource allocation algorithm with beam steering is evaluated for providing broadband wireless access to mobile users of the emerging IEEE 802.16m air interface standard. Thanks to our design, the coverage area ...

    • DReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter 

      Bielski M., Syrigos I., Katrinis K., Syrivelis D., Reale A., Theodoropoulos D., Alachiotis N., Pnevmatikatos D., Pap E.H., Zervas G., Mishra V., Saljoghei A., Rigo A., Fernando Zazo J., Lopez-Buedo S., Torrents M., Zyulkyarov F., Enrico M., Gonzalez De DIos O. (2018)
      Current datacenters are based on server machines, whose mainboard and hardware components form the baseline, monolithic building block that the rest of the system software, middleware and application stack are built upon. ...

    • Dynamic resource provisioning for energy efficiency in wireless access networks: A survey and an outlook 

      Budzisz, L.; Ganji, F.; Rizzo, G.; Ajmone Marsan, M.; Meo, M.; Zhang, Y.; Koutitas, G.; Tassiulas, L.; Lambert, S.; Lannoo, B.; Pickavet, M.; Conte, A.; Haratcherev, I.; Wolisz, A. (2014)
      Traditionally, energy efficiency aspects have been included in the wireless access network design space only in the context of power control aimed at interference mitigation and for the increase of the terminal battery ...

    • Efficient solution of large sparse linear systems in modern hardware 

      Fevgas A., Daloukas K., Tsompanopoulou P., Bozanis P. (2016)
      The solution of large-scale sparse linear systems arises in numerous scientific and engineering problems. Typical examples involve study of many real world multi-physics problems and the analysis of electric power systems. ...

    • An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits 

      Karakonstantis G., Tovletoglou K., Mukhanov L., Vandierendonck H., Nikolopoulos D.S., Lawthers P., Koutsovasilis P., Maroudas M., Antonopoulos C.D., Kalogirou C., Bellas N., Lalis S., Venugopal S., Prat-Pérez A., Lampropulos A., Kleanthous M., Diavastos A., Hadjilambrou Z., Nikolaou P., Sazeides Y., Trancoso P., Papadimitriou G., Kaliorakis M., Chatzidimitriou A., Gizopoulos D., Das S. (2018)
      The explosive growth of Internet-connected devices will soon result in a flood of generated data, which will increase the demand for network bandwidth as well as compute power to process the generated data. Consequently, ...

    • Enhancing Food Supply Chain Security through the Use of Blockchain and TinyML 

      Tsoukas V., Gkogkidis A., Kampa A., Spathoulas G., Kakarountas A. (2022)
      Food safety is a fundamental right in modern societies. One of the most pressing problems nowadays is the provenance of food and food-related products that citizens consume, mainly due to several food scares and the ...

    • GLOpenCL: OpenCL support on hardware- and software-managed cache multicores 

      Daloukas, K.; Antonopoulos, C. D.; Bellas, N. (2011)
      OpenCL is an industry supported standard for writing programs that execute on multicore platforms as well as on accelerators, such as GPUs or the SPEs of the Cell B.E. In this paper we introduce GLOpenCL, a unified development ...

    • Hardware synthesis of high-level C constructs 

      Dossis M., Dimitriou G. (2015)
      In this paper, experiments with a useable C frontend for the CCC behavioural synthesis tools are presented and analysed. This tool combination is able to rapidly deliver provably-correct hardware implementations at the RTL ...

    • A high performance and low power hardware architecture for the transform & quantization stages in H.264 

      Owaida, M.; Koziri, M.; Katsavounidis, I.; Stamoulis, G. (2009)
      In this work, we present a hardware architecture prototype for the various types of transforms and the accompanying quantization, supported in H.264 baseline profile video encoding standard. The proposed architecture ...

    • Loop pipelining in high-level synthesis with CCC 

      Dimitriou G., Dossis M., Stamoulis G. (2017)
      High-level synthesis allows the use of high-level programming languages for hardware design. Traditional programming with the C and ADA languages can lead to efficient hardware description through recently developed ...

    • Massively parallel programming models used as hardware description languages: The OpenCL case 

      Owaida, M.; Bellas, N.; Antonopoulos, C. D.; Daloukas, K.; Antoniadis, C. (2011)
      The problem of automatically generating hardware modules from high level application representations has been at the forefront of EDA research during the last few years. In this paper, we introduce a methodology to ...

    • Minimal-area loop pipelining for high-level synthesis with CCC 

      Dimitriou G., Dossis M., Stamoulis G. (2017)
      Increased complexity of computer hardware makes close to impossible to rely on hand-coding at the-level of HDLs for digital hardware design. High-level synthesis can be employed instead, in order to automatically obtain ...

    • Mixed THz/FSO Relaying Systems: Statistical Analysis and Performance Evaluation 

      Li S., Yang L., Zhang J., Bithas P.S., Tsiftsis T.A., Alouini M.-S. (2022)
      In this paper, the performance of a mixed Terahertz/free-space optical (THz/FSO) wireless transmission system is studied, where the joint effects of channel fading and pointing errors are considered for both THz and FSO ...

    • On emulating hardware/software co-designed control algorithms for packet switches 

      Syrivelis, D.; Giaccone, P.; Koutsopoulos, I.; Pretti, M.; Tassiulas, L. (2014)
      Hardware accelerators in networking systems for control algorithms offer a promising approach to scale performance. To that end, several research efforts have been devoted to verify a hardware version of complex control ...

    • On interconnecting and orchestrating components in disaggregated data centers: The dReDBox project vision 

      Katrinis K., Zervas G., Pnevmatikatos D., Syrivelis D., Alexoudi T., Theodoropoulos D., Raho D., Pinto C., Espina F., Lopez-Buedo S., Chen Q., Nemirovsky M., Roca D., Klos H., Berends T. (2016)
      Computing systems servers-low-or high-end ones have been traditionally designed and built using a main-board and its hardware components as a 'hard' monolithic building block; this formed the base unit on which the system ...

    • On the characterization of OpenCL dwarfs on fixed and reconfigurable platforms 

      Krommydas, K.; Feng, W. C.; Owaida, M.; Antonopoulos, C. D.; Bellas, N. (2014)
      The proliferation of heterogeneous computing platforms presents the parallel computing community with new challenges. One such challenge entails evaluating the efficacy of such parallel architectures and identifying the ...

    • OpenDwarfs: Characterization of Dwarf-Based Benchmarks on Fixed and Reconfigurable Architectures 

      Krommydas K., Feng W.-C., Antonopoulos C.D., Bellas N. (2016)
      The proliferation of heterogeneous computing platforms presents the parallel computing community with new challenges. One such challenge entails evaluating the efficacy of such parallel architectures and identifying the ...

    • Resolving Loop Pipelining Issues in the CCC High-level Synthesis E-CAD Framework 

      Dossis M., Dimitriou G. (2018)
      Academic High-level Synthesis tools like CustomCoprocessorsCompiler have recently evolved in new versions with expanded functionality and more aggressive optimization schemes in order to satisfy hardware implementation ...