• Compiler transformations in hardware synthesis of Mpeg2 codes 

      Chatzianastasiou G., Tsakyridis A., Dimitriou G., Stamoulis G., Dossis M. (2016)
      High-level synthesis is the technique that translates high-level programming language programs into equivalent hardware descriptions. The use of conventional programming languages as input to high-level synthesis is ...
    • Exploiting 3D Hand Pose Estimation in Deep Learning-Based Sign Language Recognition from RGB Videos 

      Parelli M., Papadimitriou K., Potamianos G., Pavlakos G., Maragos P. (2020)
      In this paper, we investigate the benefit of 3D hand skeletal information to the task of sign language (SL) recognition from RGB videos, within a state-of-the-art, multiple-stream, deep-learning recognition system. As most ...
    • Hardware synthesis of high-level C constructs 

      Dossis M., Dimitriou G. (2015)
      In this paper, experiments with a useable C frontend for the CCC behavioural synthesis tools are presented and analysed. This tool combination is able to rapidly deliver provably-correct hardware implementations at the RTL ...
    • Loop pipelining in high-level synthesis with CCC 

      Dimitriou G., Dossis M., Stamoulis G. (2017)
      High-level synthesis allows the use of high-level programming languages for hardware design. Traditional programming with the C and ADA languages can lead to efficient hardware description through recently developed ...
    • Massively parallel programming models used as hardware description languages: The OpenCL case 

      Owaida, M.; Bellas, N.; Antonopoulos, C. D.; Daloukas, K.; Antoniadis, C. (2011)
      The problem of automatically generating hardware modules from high level application representations has been at the forefront of EDA research during the last few years. In this paper, we introduce a methodology to ...
    • Minimal-area loop pipelining for high-level synthesis with CCC 

      Dimitriou G., Dossis M., Stamoulis G. (2017)
      Increased complexity of computer hardware makes close to impossible to rely on hand-coding at the-level of HDLs for digital hardware design. High-level synthesis can be employed instead, in order to automatically obtain ...
    • Multimodal sign language recognition via temporal deformable convolutional sequence learning 

      Papadimitriou K., Potamianos G. (2020)
      In this paper we address the challenging problem of sign language recognition (SLR) from videos, introducing an end-to-end deep learning approach that relies on the fusion of a number of spatio-temporal feature streams, ...
    • Operation Dependencies in Loop Pipelining for High-Level Synthesis 

      Dimitriou G., Dossis M., Stamoulis G. (2018)
      Research and industry interest in high-level synthesis has been renewed in the last few years, proven by the introduction of new tools or improved versions of existing tools. Academic tools like Gaut or CCC have recently ...
    • Proteus: An architectural synthesis tool based on the stream programming paradigm 

      Bellas, N.; Chai, S. M.; Dwyer, M.; Linzmeier, D.; Lopez-Lagunas, A. (2009)
      The problem of automatically generating hardware modules from a high level representation of an application has been at the forefront of EDA research in the last few years. Such an EDA methodology would potentially enable ...
    • Source-level compiler optimizations for high-level synthesis 

      Dimitriou G., Chatzianastasiou G., Tsakyridis A., Stamoulis G., Dossis M. (2016)
      With high-level synthesis becoming the preferred method for hardware design, tools that operate on high-level programming languages and optimize hardware output are crucial for successful synthesis. In high-level synthesis, ...