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Listar por tema "Compiler optimizations"

Mostrando ítems 1-9 de 9

    • Branchless Code Generation for Modern Processor Architectures 

      Angelou A., Dadaliaris A., Dossis M., Dimitriou G. (2021)
      Compilers apply transformations to the code they compile in order to make it run faster without changing its behavior. This process is called code optimization. Modern compilers apply many different passes of code optimization ...

    • Compiler transformations in hardware synthesis of Mpeg2 codes 

      Chatzianastasiou G., Tsakyridis A., Dimitriou G., Stamoulis G., Dossis M. (2016)
      High-level synthesis is the technique that translates high-level programming language programs into equivalent hardware descriptions. The use of conventional programming languages as input to high-level synthesis is ...

    • Exploring the Effects of Code Optimizations on CPU Frequency Margins 

      Parasyris K., Bellas N., Antonopoulos C.D., Lalis S. (2018)
      Chip manufactures introduce redundancy at various levels of CPU design to guarantee correct operation even for worst-case combinations of non-idealities in process variation and system operation conditions. This redundancy ...

    • Loop pipelining in high-level synthesis with CCC 

      Dimitriou G., Dossis M., Stamoulis G. (2017)
      High-level synthesis allows the use of high-level programming languages for hardware design. Traditional programming with the C and ADA languages can lead to efficient hardware description through recently developed ...

    • Massively parallel programming models used as hardware description languages: The OpenCL case 

      Owaida, M.; Bellas, N.; Antonopoulos, C. D.; Daloukas, K.; Antoniadis, C. (2011)
      The problem of automatically generating hardware modules from high level application representations has been at the forefront of EDA research during the last few years. In this paper, we introduce a methodology to ...

    • Minimal-area loop pipelining for high-level synthesis with CCC 

      Dimitriou G., Dossis M., Stamoulis G. (2017)
      Increased complexity of computer hardware makes close to impossible to rely on hand-coding at the-level of HDLs for digital hardware design. High-level synthesis can be employed instead, in order to automatically obtain ...

    • Operation Dependencies in Loop Pipelining for High-Level Synthesis 

      Dimitriou G., Dossis M., Stamoulis G. (2018)
      Research and industry interest in high-level synthesis has been renewed in the last few years, proven by the introduction of new tools or improved versions of existing tools. Academic tools like Gaut or CCC have recently ...

    • Resolving Loop Pipelining Issues in the CCC High-level Synthesis E-CAD Framework 

      Dossis M., Dimitriou G. (2018)
      Academic High-level Synthesis tools like CustomCoprocessorsCompiler have recently evolved in new versions with expanded functionality and more aggressive optimization schemes in order to satisfy hardware implementation ...

    • Source-level compiler optimizations for high-level synthesis 

      Dimitriou G., Chatzianastasiou G., Tsakyridis A., Stamoulis G., Dossis M. (2016)
      With high-level synthesis becoming the preferred method for hardware design, tools that operate on high-level programming languages and optimize hardware output are crucial for successful synthesis. In high-level synthesis, ...